Devansh Jain

I am a third year Ph.D. student in the Siebel School of Computing and Data Science at the University of Illinois Urbana-Champaign (UIUC), advised by Prof. Charith Mendis. I am the lead researcher of the ACT (Accelerator Compiler Toolkit) Ecosystem, which automatically generates software tools such as scalable simulation infrastructure and ML compiler backends from high-level ISA specifications of AI accelerators.

I’m broadly interested in programming languages, compilers, and computer architecture. My research involves building end-to-end tensor compiler infrastructures that automatically generate optimized compiler backends from high-level accelerator ISA descriptions, enabling rapid prototyping and evaluation on emerging ML hardware. I have authored/co-authored multiple papers at top-tier PL & systems conferences, including POPL, OOPSLA, and MICRO, with a Distinguished Paper Award at POPL’25.

Prior to joining UIUC, I completed my B.Tech. (with Honors) from IIT Bombay in 2023, where I was advised by Prof. Uday Khedkar for my thesis on “CoS-SSA: SSA for Context-Sensitive Interprocedural Analysis”. Outside of research, I enjoy following chess, Formula 1 (F1), endurance racing (WEC), and play table tennis regularly.

Where to find me: Room 4111, Siebel Center for Computer Science
201 N. Goodwin Ave., Urbana IL 61801
Email: devansh9 (at) illinois.edu

Selected Publications

ISPASS

MINISA: Minimal Instruction Set Architecture for Next-gen Reconfigurable Inference Accelerator

Jianming Tong, Devansh Jain, Yujie Li, Charith Mendis, and Tushar Krishna

In 2026 IEEE International Symposium on Performance Analysis of Systems and Software (to appear)

Apr 2026

DOI Bib PDF

@article{minisa-ispass2026,
  author = {Tong, Jianming and Jain, Devansh and Li, Yujie and Mendis, Charith and Krishna, Tushar},
  title = {MINISA: Minimal Instruction Set Architecture for Next-gen Reconfigurable Inference Accelerator},
  year = {2026},
  issue_date = {April 2026},
  url = {https://arxiv.org/abs/2603.20623},
  doi = {10.48550/arXiv.2603.20623},
  month = apr
}

arXiv

ACT: Automatically Generating Compiler Backends from Tensor Accelerator ISA Descriptions

Devansh Jain, Akash Pardeshi, Marco Frigo, Krut Patel, Kaustubh Khulbe, Jai Arora, and Charith Mendis

Oct 2025

DOI Bib PDF

@misc{act-arxiv,
  title = {ACT: Automatically Generating Compiler Backends from Tensor Accelerator ISA Descriptions},
  author = {Jain, Devansh and Pardeshi, Akash and Frigo, Marco and Patel, Krut and Khulbe, Kaustubh and Arora, Jai and Mendis, Charith},
  year = {2025},
  eprint = {2510.09932},
  archiveprefix = {arXiv},
  primaryclass = {cs.PL},
  url = {https://arxiv.org/abs/2510.09932},
  doi = {10.48550/arXiv.2510.09932},
  month = oct
}

MICRO

TAIDL: Tensor Accelerator ISA Definition Language with Auto-generation of Scalable Test Oracles

Devansh Jain, Marco Frigo, Jai Arora, Akash Pardeshi, Zhihao Wang, Krut Patel, and Charith Mendis

In 58th IEEE/ACM International Symposium on Microarchitecture (MICRO 2025)

Oct 2025

DOI Bib PDF

@inproceedings{taidl-micro2025,
  author = {Jain, Devansh and Frigo, Marco and Arora, Jai and Pardeshi, Akash and Wang, Zhihao and Patel, Krut and Mendis, Charith},
  title = {TAIDL: Tensor Accelerator ISA Definition Language with Auto-generation of Scalable Test Oracles},
  year = {2025},
  isbn = {9798400715730},
  publisher = {Association for Computing Machinery},
  address = {New York, NY, USA},
  url = {https://doi.org/10.1145/3725843.3756075},
  doi = {10.1145/3725843.3756075},
  booktitle = {Proceedings of the 2025 58th IEEE/ACM International Symposium on Microarchitecture},
  pages = {1316–1333},
  numpages = {18},
  series = {MICRO '25},
  month = oct
}

OOPSLA

SPLAT: A Framework for Optimised GPU Code-Generation for SParse reguLar ATtention

Ahan Gupta, Yueming Yuan, Devansh Jain, Yuhao Ge, David Aponte, Yanqi Zhou, and Charith Mendis

In 2025 volume of PACMPL(OOPSLA)

Apr 2025

DOI Bib PDF

@article{splat-oopsla2025,
  author = {Gupta, Ahan and Yuan, Yueming and Jain, Devansh and Ge, Yuhao and Aponte, David and Zhou, Yanqi and Mendis, Charith},
  title = {SPLAT: A Framework for Optimised GPU Code-Generation for SParse reguLar ATtention},
  year = {2025},
  issue_date = {April 2025},
  publisher = {Association for Computing Machinery},
  address = {New York, NY, USA},
  volume = {9},
  number = {OOPSLA1},
  url = {https://doi.org/10.1145/3720503},
  doi = {10.1145/3720503},
  journal = {Proc. ACM Program. Lang.},
  month = apr,
  articleno = {138},
  numpages = {29},
  keywords = {Code-generation, Deep Learning, Large Language Models}
}

POPL

TensorRight: Automated Verification of Tensor Graph Rewrites

Jai Arora, Sirui Lu, Devansh Jain, Tianfan Xu, Farzin Houshmand, Phitchaya Mangpo Phothilimthana, Mohsen Lesani, Praveen Narayanan, Karthik Srinivasa Murthy, Rastislav Bodik, Amit Sabne, and Charith Mendis

In 52nd ACM SIGPLAN Symposium on Principles of Programming Languages

Jan 2025

Distinguished Paper Award

DOI Bib PDF

Distinguished Paper Award

@article{tensorright-popl2025,
  author = {Arora, Jai and Lu, Sirui and Jain, Devansh and Xu, Tianfan and Houshmand, Farzin and Phothilimthana, Phitchaya Mangpo and Lesani, Mohsen and Narayanan, Praveen and Murthy, Karthik Srinivasa and Bodik, Rastislav and Sabne, Amit and Mendis, Charith},
  title = {TensorRight: Automated Verification of Tensor Graph Rewrites},
  year = {2025},
  issue_date = {January 2025},
  publisher = {Association for Computing Machinery},
  address = {New York, NY, USA},
  volume = {9},
  number = {POPL},
  url = {https://doi.org/10.1145/3704865},
  doi = {10.1145/3704865},
  journal = {Proc. ACM Program. Lang.},
  month = jan,
  articleno = {29},
  numpages = {32},
  keywords = {Denotational Semantics, Tensor Compilers, Unbounded Verification}
}